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AK09916_REGISTERS.h
Go to the documentation of this file.
1
#ifndef _AK09916_REGISTERS_H_
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#define _AK09916_REGISTERS_H_
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#include <stdint.h>
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typedef
enum
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{
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AK09916_REG_WIA1
= 0x00,
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AK09916_REG_WIA2
,
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AK09916_REG_RSV1
,
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AK09916_REG_RSV2
,
// Reserved register. We start reading here when using the DMP. Secret sauce...
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// discontinuity - containing another nine reserved registers? Secret sauce...
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AK09916_REG_ST1
= 0x10,
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AK09916_REG_HXL
,
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AK09916_REG_HXH
,
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AK09916_REG_HYL
,
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AK09916_REG_HYH
,
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AK09916_REG_HZL
,
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AK09916_REG_HZH
,
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// discontinuity
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AK09916_REG_ST2
= 0x18,
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// discontinuity
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AK09916_REG_CNTL2
= 0x31,
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AK09916_REG_CNTL3
,
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}
AK09916_Reg_Addr_e
;
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typedef
struct
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{
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uint8_t
WIA1
;
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}
AK09916_WIA1_Reg_t
;
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typedef
struct
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{
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uint8_t
WIA2
;
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}
AK09916_WIA2_Reg_t
;
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typedef
struct
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{
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uint8_t
DRDY
: 1;
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uint8_t
DOR
: 1;
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uint8_t
reserved_0
: 6;
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}
AK09916_ST1_Reg_t
;
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// typedef struct{
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// }AK09916_HXL_Reg_t;
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// typedef struct{
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// }AK09916_HXH_Reg_t;
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// typedef struct{
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// }AK09916_HYL_Reg_t;
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// typedef struct{
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// }AK09916_HYH_Reg_t;
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// typedef struct{
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// }AK09916_HZL_Reg_t;
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// typedef struct{
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// }AK09916_HZH_Reg_t;
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typedef
struct
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{
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uint8_t
reserved_0
: 3;
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uint8_t
HOFL
: 1;
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uint8_t
reserved_1
: 4;
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}
AK09916_ST2_Reg_t
;
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typedef
struct
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{
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uint8_t
MODE
: 5;
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uint8_t
reserved_0
: 3;
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}
AK09916_CNTL2_Reg_t
;
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typedef
struct
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{
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uint8_t
SRST
: 1;
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uint8_t
reserved_0
: 7;
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}
AK09916_CNTL3_Reg_t
;
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#endif
// _AK09916_REGISTERS_H_
AK09916_Reg_Addr_e
AK09916_Reg_Addr_e
Definition
AK09916_REGISTERS.h:7
AK09916_REG_RSV2
@ AK09916_REG_RSV2
Definition
AK09916_REGISTERS.h:11
AK09916_REG_HZL
@ AK09916_REG_HZL
Definition
AK09916_REGISTERS.h:18
AK09916_REG_HXL
@ AK09916_REG_HXL
Definition
AK09916_REGISTERS.h:14
AK09916_REG_HXH
@ AK09916_REG_HXH
Definition
AK09916_REGISTERS.h:15
AK09916_REG_HYL
@ AK09916_REG_HYL
Definition
AK09916_REGISTERS.h:16
AK09916_REG_ST2
@ AK09916_REG_ST2
Definition
AK09916_REGISTERS.h:21
AK09916_REG_RSV1
@ AK09916_REG_RSV1
Definition
AK09916_REGISTERS.h:10
AK09916_REG_ST1
@ AK09916_REG_ST1
Definition
AK09916_REGISTERS.h:13
AK09916_REG_HYH
@ AK09916_REG_HYH
Definition
AK09916_REGISTERS.h:17
AK09916_REG_CNTL3
@ AK09916_REG_CNTL3
Definition
AK09916_REGISTERS.h:24
AK09916_REG_WIA2
@ AK09916_REG_WIA2
Definition
AK09916_REGISTERS.h:9
AK09916_REG_HZH
@ AK09916_REG_HZH
Definition
AK09916_REGISTERS.h:19
AK09916_REG_CNTL2
@ AK09916_REG_CNTL2
Definition
AK09916_REGISTERS.h:23
AK09916_REG_WIA1
@ AK09916_REG_WIA1
Definition
AK09916_REGISTERS.h:8
AK09916_CNTL2_Reg_t
Definition
AK09916_REGISTERS.h:72
AK09916_CNTL2_Reg_t::MODE
uint8_t MODE
Definition
AK09916_REGISTERS.h:73
AK09916_CNTL2_Reg_t::reserved_0
uint8_t reserved_0
Definition
AK09916_REGISTERS.h:74
AK09916_CNTL3_Reg_t
Definition
AK09916_REGISTERS.h:78
AK09916_CNTL3_Reg_t::reserved_0
uint8_t reserved_0
Definition
AK09916_REGISTERS.h:80
AK09916_CNTL3_Reg_t::SRST
uint8_t SRST
Definition
AK09916_REGISTERS.h:79
AK09916_ST1_Reg_t
Definition
AK09916_REGISTERS.h:38
AK09916_ST1_Reg_t::reserved_0
uint8_t reserved_0
Definition
AK09916_REGISTERS.h:41
AK09916_ST1_Reg_t::DRDY
uint8_t DRDY
Definition
AK09916_REGISTERS.h:39
AK09916_ST1_Reg_t::DOR
uint8_t DOR
Definition
AK09916_REGISTERS.h:40
AK09916_ST2_Reg_t
Definition
AK09916_REGISTERS.h:65
AK09916_ST2_Reg_t::reserved_0
uint8_t reserved_0
Definition
AK09916_REGISTERS.h:66
AK09916_ST2_Reg_t::reserved_1
uint8_t reserved_1
Definition
AK09916_REGISTERS.h:68
AK09916_ST2_Reg_t::HOFL
uint8_t HOFL
Definition
AK09916_REGISTERS.h:67
AK09916_WIA1_Reg_t
Definition
AK09916_REGISTERS.h:28
AK09916_WIA1_Reg_t::WIA1
uint8_t WIA1
Definition
AK09916_REGISTERS.h:29
AK09916_WIA2_Reg_t
Definition
AK09916_REGISTERS.h:33
AK09916_WIA2_Reg_t::WIA2
uint8_t WIA2
Definition
AK09916_REGISTERS.h:34
SparkFun_9DoF_IMU_Breakout___ICM_20948___Arduino_Library-1.2.13
src
util
AK09916_REGISTERS.h
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